The machine mode privileged spec defines how each CPU/HART starts execution. The MTVEC register defines the entry point on interrupts.
These are grouped into an startup.S assembler file, along with a basic reset handler to setup an environment that can execute compiled C code.
- The location of the reset vector is implementation defined.
- The reset vector is the default value of the PC of each CPU/HART - That is the instruction is fetched from the reset vector address, rather than used to load a PC (and SP) as in some architectures.
- The address could be the start of a routine, or jump to the reset handler.
- The location of the NMI vector is also implementation defined.
- A logical location may be near the reset vector.
- The NMI is used only for hardware conditions, unlike some architectures where it can be externally triggered.
- As for reset, on the error condition the NMI vector is loaded directly to the PC.
- Interrupt Vectors
- Again this is implementation specific, but there are two main modes, vectored and direct.
- The reset handler function.
- The vector table.
- This can be a single entry point (MTVEC),
- or a table that takes between 128 bytes.
- Again the location in memory is implementation specific.
One possible layout is: